SGA-GPLANAR: STM-1/4/16 and 10/100/1000 Ethernet Card with 2xSFP |
Introduction
The SGA-GPLANAR card is more powerful and versatile than the SGA-155 and SGA-1GED cards. It has a PCI Express x4 bus for quicker data transfer to the PC, and two SFP slots for changeable transceiver modules. The transceivers can be STM-1/4/16 optical units or 10/100/1000 Mbps copper/fiber Ethernet ones. The card also features one G-PON optical interface..
Technical description
The PCB can accomodate two types of devices:
- XC5VLX50T-1FF1136C (for GPLANAR1 board)
- XC5VLX110T-2FF1136C (for GPLANAR1X board)
Four GPLANAR1 models can be produced depending on the insertion of FPGA type, and the OLT transceiver as shown below:
| Model | FPGA | ONT
TRX |
| GPLANAR1 | XC5VLX50T | Yes |
| GPLANAR1S | XC5VLX50T | No |
| GPLANAR1X | XC5VLX110T | Yes |
| GPLANAR1SX | XC5VLX110T | No |
MultiRate/Standard Dual SFPs: The GPLANAR1 board has two SFP module cages (P1,P2) that support user-installed SFP modules to support STM-1 to STM-16 (Synchronous Digital Hierarchy - SDH) and Gigabit Ethernet interfaces.
Additional builtin FPGA components:
- One PCI Express Endpoint Controller
- 2 Tri-mode (10/100/1000) Ethernet Media Access Controller (MAC)
- 2 Internal Configuration Acces Ports (ICAP)
Card components:
- The PCI Express endpoint connector (designated as J1 on-board) allows an FPGA design to support x1 and x4 gigabit lanes to communicate with the host, at the speed of 2.5 Gbps of each.
- GPON ONT Transceiver: GPLANAR1 aims the emulation of multiple GPON ONUs. (Optical Network Unit). The main part of the ONU is the ONT (Optical Network Termination) transceiver.
- DDR2 SODIMM RAM: The GPLANAR1 board contains a 200-pin, small-outline dual in-line memory module (SODIMM) receptacle ( J3 ) that supports installation of DDR2 SDRAM SODIMMs of 128MB, 256MB, or 512 MB.
- Feature Connector
- Status LEDs
Features
- 64 bit Timestamp with 4/8 nsec resolution
- lossless packet capture limited only by host PC's speed and resources
- header-only capture: configurable protocol layer depth decoded by hardware on the fly
- fully PCAP/WINPCAP compliant interface (fe. wireshark integration)
- parameterised line speed capable packet/flow generator for active measurements
- RFC 2544 tester implementation
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